| Job Category : IT- ASIC/Chip Design |
Job detail |
| Excellent Openings For ASIC Verification Professionals |
Posted on : 12th-Apr-07 |
| Contact : , 09989687622 |
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| Job Location: Hyderabad, , INDIA |
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| Description |
Currently, we have critical openings with one of our Clients, a CMM Level 5 Company, Hyderabad for Professionals into ASIC verification.
Details of Requirement
ASIC Verification Engineer requirement:
For the verification engineers, we are looking at 4-10 yrs experienced people to fit at various levels.
• Should have worked at verifying at block level and at SOC level (multi-million gate ASIC). Experience using ncsim, Debussy, Verdi is a plus.
• Should have worked on verification of ASIC at fullchip level, develop detailed test plan and regression suites and be responsible for running gate level timing simulations for the ASIC and work with design engineers to achieve complete coverage to get first working silicon.
• Exposure to Verilog, C, PLI based ASIC verification is a must.
• Experience with verification methodologies using HVLs (Vera, Specman, SystemC), is a plus.
Job Location: Hyderabad.
If your candidature meets the above requirement, kindly forward your updated resume to the mail id mentioned . |
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