| Resume Category : IT- Embedded/VLSI |
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| Vishal Puradkar/MTech/VLSI/81.63%/Exp: Jan2007-Current |
Posted on : 27th-Apr-07 |
| Location: India |
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| Contact : Vishal Puradkar, Ph. 9845888927 |
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| Description |
VISHAL P. PURADKAR
Zion, 7/A- 5th Main 15th Cross,
K.R. Garden, Mrugesh Palya,
Bangalore - 560017
Contact Number: +91-98458-88927
E-Mail: vpuradkar@gmail.com
Objective
To pursue a challenging career and be part of a progressive organization that gives scope to enhance my knowledge, skills and reach pinnacle in VLSI field with sheer determination and hard work.
Educational Qualification
M.Tech. (Microelectronics and VLSI Design, 2006) from S.G.S.I.T.S., Indore, INDIA, R.G.P.V.University, with 81.63% (Honors).
Bachelor of Engineering (Electronics and Telecommunication, 2002) from V.Y.W.S., College of Engineering, Badnera, Amaravati, INDIA, Amaravati University, with 65.05%.
Diploma (Electronics and Communication, 1999) from Anjuman Polytechnic, Nagpur, with 68.10%.
Computer Literacy
Packages: Exposure to EDA tools like Modelsim, Xilinx ISE, SPICE, Tanner tools & MS Office.
Programming languages: C, C++, Verilog, VHDL, SPICE.
Assembly languages: Programming in 8085.
Work Experience
Jan 2007- Current Semi Square Consultant (P) Ltd. Bangalore, India
Design Engineer
Implemented the AES-128 and ECMA-369 standard management interface in Verilog.
Involved in formal verification of PHY-MAC interface.
Project & Seminars
Project on Time Activated Switches (VHDL, in M.Tech.): This project handling human oriented schedules is the most important goal. Here time scheduled for 4 devices which can be extended if required. The schedule for these devices will be given by the user. System starts by setting a 24 hr clock; this is followed by selecting a port number unique for each device, followed by the time to activate the event and then the time to deactivate it.
Project on An ADC BIST with On-chip Ramp Generator (Using S-Edit and T-Spice, In M.Tech.): In this project the suggested techniques to make on-chip ramp generator testing of analog–digital converters (ADCs). The goal of these techniques is to overcome the complexity of integrating a traditional ac characterization approach. An on-chip ramp generator (OCRG) allows the testing of an ADC using a discrete-time (DT) adaptive approach.
Project on Performance Evaluation of 32-bit CMOS VLSI Adders, Layout Perspective (Tanner Tool, In M.Tech.): This project discusses the design of various CMOS adders. The performance of the designed adders has been analyzed based on speed, area and power from a Layout perspective and a comparative chart has been prepared. One conclusion is that the Carry Lookahead Adder is faster than other adders over the supply voltage range of 2.5V to 5V, but its disadvantage is that it consumes large area.
Project on Word Recognition & Analysis (C, In final year B.E.): When a word is spoken in a microphone which is a transducer changes the sound waves into digital signals. During Training Phase, the system is trained by the user. The samples are stored and are used later for matching during recognition. When an unknown word is spoken, sample voltage of unknown word are compare with those of the words stored in the database. When its finds a closest match (90%), it stops checking and will display that “The match is found” and print the match word over the screen.
Paper Under Consideration
Title:- “Performance Evaluation of 32-bit CMOS VLSI Adders, Layout Perspective.”
Journal:- Journal of the Instrumentation Society of India.
Date of Consideration:- 23/06/2006
Manuscript has been assigned the no. 2006/8
Title:- “An ADC BIST with on chip ramp generator.”
Journal:- International Journal of Electronic
Date of Consideration:- 12/12/2006
Manuscript has been assigned the no. 2006H0237
Personal Information
Father’s Name: Premraj S. Puradkar
Date of Birth: 27th May 1980
Gender: Male
Marital Status: Singal
Nationality: Indian
Passport Number: E2914429
Alternate e-mail: vpuradkar@yahoo.com
I hereby declare that entries made in this resume are correct to the best of my knowledge and belief. I assure that given a job in your esteemed company, I shall fulfill the work assigned to my best with all my heart and soul.
Vishal P. Puradkar |
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